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DSPLL technology based crystal oscillator SKYWORKS 510SAA-CAAG for stable and frequency generation solutions

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DSPLL technology based crystal oscillator SKYWORKS 510SAA-CAAG for stable and frequency generation solutions

Frequency Stability : ±50ppm

Output Type : -

Voltage - Supply : 1.8V

Frequency : 212.5MHz

Operating Temperature : -40℃~+85℃

Description : ±50ppm 1.8V 212.5MHz SMD7050-6P Programmable Oscillators RoHS

Mfr. Part # : 510SAA-CAAG

Model Number : 510SAA-CAAG

Package : SMD7050-6P

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Product Overview

The Skyworks Si510/511 Crystal Oscillator (XO) is an advanced, IC-based frequency generation solution utilizing DSPLL technology. It offers any frequency output from 100 kHz to 250 MHz using a single fixed crystal, eliminating the need for multiple crystals for different frequencies. This approach enhances reliability, mechanical robustness, and stability while providing superior supply noise rejection for low-jitter clock generation in noisy environments. The Si510/511 is factory-configurable for various user specifications, including frequency, supply voltage, output format, and stability, with short lead times and no NRE charges.

Product Attributes

Brand: Skyworks Solutions, Inc.
Technology: DSPLL
Certifications: Pb-free, RoHS compliant
Package Options: 5 x 7 mm, 3.2 x 5 mm, 2.5 x 3.2 mm
Lead Times: 2 to 4 weeks

Technical Specifications

Parameter	Symbol	Test Condition	Min	Typ	Max	Unit
Operating Specifications
Supply Voltage	VDD	3.3 V option	2.97	3.3	3.63	V
		2.5 V option	2.25	2.5	2.75	V
		1.8 V option	1.71	1.8	1.89	V
Supply Current	IDD	CMOS, 100 MHz, single-ended		21	26	mA
		LVDS (output enabled)		19	23	mA
		LVPECL (output enabled)		39	43	mA
		HCSL (output enabled)		41	44	mA
		Tristate (output disabled)			18	mA
Operating Temperature	TA		40		85	C
Output Clock Frequency Characteristics
Nominal Frequency	FO	CMOS, Dual CMOS	0.1		212.5	MHz
		LVDS/LVPECL/HCSL	0.1		250	MHz
Total Stability		Frequency Stability Grade C	30		+30	ppm
		Frequency Stability Grade B	50		+50	ppm
		Frequency Stability Grade A	100		+100	ppm
Startup Time	TSU	Minimum VDD until output frequency (FO) within specification			10	ms
Disable Time	TD	FO 10 MHz			5	s
		FO < 10 MHz			40	s
Enable Time	TE	FO 10 MHz			20	s
		FO < 10 MHz			60	s
Output Clock Levels and Symmetry
CMOS Output Logic High	VOH		0.85 x VDD			V
CMOS Output Logic Low	VOL				0.15 x VDD	V
CMOS Output Rise/Fall Time (20 to 80% VDD)	TR/TF	0.1 to 212.5 MHz, CL = 15 pF	0.45	0.8	1.2	ns
LVPECL Output Rise/Fall Time (20 to 80% VDD)	TR/TF		100		565	ps
HCSL Output Rise/Fall Time (20 to 80% VDD)	TR/TF		100		470	ps
LVDS Output Rise/Fall Time (20 to 80% VDD)	TR/TF		350		800	ps
Duty Cycle	DC	All formats	48	50	52	%
Output Clock Jitter and Phase Noise (LVPECL)
Period Jitter (RMS)	JPRMS	10k samples			1.3	ps
Period Jitter (Pk-Pk)	JPPKPK	10k samples			11	ps
Phase Jitter (RMS)	J	1.875 MHz to 20 MHz integration bandwidth (brickwall)		0.31	0.5	ps
		12 kHz to 20 MHz integration bandwidth (brickwall)		0.8	1.0	ps
Phase Noise, 156.25 MHz	N	100 Hz		86		dBc/Hz
		1 kHz		109		dBc/Hz
		10 kHz		116		dBc/Hz
		100 kHz		123		dBc/Hz
		1 MHz		136		dBc/Hz
Additive RMS Jitter Due to External Power Supply Noise	JPSR	10 kHz sinusoidal noise		3.0		ps

2411041604_SKYWORKS-510SAA-CAAG_C7024298.pdf

DSPLL technology based crystal oscillator SKYWORKS 510SAA-CAAG for stable and frequency generation solutions Images

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